In liquid crystal display devices, display elements are capacitive elements, a voltage is applied between electrodes which are arranged so as to sandwich the liquid crystal layer therebetween, and image display is performed with pixel-by-pixel control of transmittance of the liquid crystal layer. In an active matrix liquid crystal display device, a pixel electrode is connected to a source bus line via a switching element (pixel transistor), and electric charges of the pixel during a non-selected period are retained when the switching element is turned off.
In such an active matrix liquid crystal display device, electric charges retained in the pixel electrode need to be let out at the power-off of the device. As a matter of course, this operation is performed because displayed image does not disappear on an active matrix liquid crystal display device which has been powered off if the electric charges remain in the pixel electrode.
In the active matrix liquid crystal display device which has been powered off, voltages of all source bus lines and gate bus lines are finally dropped to the GND level, and electric charges retained in each pixel disappear by virtue of a leak current with the passage of time. In other words, displayed image disappears since a leak current combines with electric charges remained in circuits in a panel, pixels, and other components, and voltages of all the components in the panel finally come close to the same voltage. In this case, however, it takes too much time to let out electric charges in the pixels, and defective image caused by the remaining electric charges appears on the display until the display image disappears. Therefore, in the active matrix liquid crystal display device, it is necessary to quickly let out electric charges of the pixel electrodes at the power-off of the device. The following will describe a method of quickly letting out electric charges of the pixel electrodes at the power-off of the device with reference to FIG. 10.
FIG. 10 shows the arrangement of components related to a source bus line 101 in an active matrix liquid crystal display device. As illustrated in FIG. 10, a pixel 103 is connected to the source bus line 101 via a pixel transistor 104. More specifically, a pixel electrode in the pixel 103 is connected to a drain of a pixel transistor 104, and the source bus line 101 is connected to a source of the pixel transistor 104. Furthermore, a gate of the pixel transistor 104 is connected to the gate bus line 102.
To a display-signal-supply end of the source bus line 101 (on the upper side of FIG. 10), a sampling transistor 105 and an end buffer 106 for a signal that controls the sampling transistor 105 are connected. The sampling transistor 105 switches on/off application of a display signal to the source bus line 101. To a scan-signal-supply end (on the left side of FIG. 10) of the gate bus line 102, an end buffer 107 that controls a scan signal supplied to the gate bus line 102 is connected.
A possible approach to letting out electric charges of a pixel electrode at the power-off of the liquid crystal display device arranged in FIG. 10 is to drop a voltage VSS to the GND before a voltage VDD drops thereto. FIG. 11 illustrates the voltages VSS and VDD until the voltages VSS and VDD drop to the GND.
At this time, when the VSS voltage reaches the GND before the voltage VDD reaches the GND, LOW level of a scan signal increases, and the pixel transistor 104 to which a scan signal of the voltage VSS is fed becomes half-open (the pixel transistor is not completely turned on, but has a certain degree of electrical continuity). This makes it possible to let the electric charges accumulated in the pixel 103 escape to the source bus line via the pixel transistor 104. Further, in a case where the pixel transistor 104 and the sampling transistor 105 have the same polarity (In FIG. 10, both the pixel transistor 104 and the sampling transistor 105 are N-channel transistors), the sampling transistor 105 also becomes half-open when a voltage VSS is set to GND. This lets the electric charges escaping to the source bus line escape to the outside through the sampling transistor 105.
Patent documents 1 and 2 disclose another methods for letting out electric charges of pixels at the power-off of the active matrix liquid crystal display device.
That is, Patent Document 1 discloses a method in which each source bus line is connected to a common signal power source via a CMOS-type FET, and at the power-off of a liquid crystal display device, active elements (pixel transistors) of all pixels are brought into electrical continuity, and the CMOS-type FET is brought into electrical continuity to supply a common signal voltage to each source bus line, so that a potential difference between the pixels is eliminated.
Patent Document 2 discloses a method in which at the power-off of the liquid crystal display device, active elements (pixel transistors) of all pixels are brought into electrical continuity, and a voltage that is at the same potential as a common signal voltage is supplied from the source driver to each source bus line.
[Patent Document 1]
Japanese Unexamined Patent Publication No. 347627/2000 (Tokukai 2000-347627; published on Dec. 15, 2000)
[Patent Document 2]
Japanese Unexamined Patent Publication No. 45785/2004 (Tokukai 2004-45785; published on Feb. 12, 2004)